1. Field of the Invention
The present invention generally relates to a semiconductor device and its fabricating method, and particularly, to a semiconductor device with narrow-pitch protruding electrodes.
2. Description of the Related Art
In recent years, semiconductor devices incorporated in electric equipment have been made smaller and smaller along with miniaturization of the electric equipment. A semiconductor device or a semiconductor chip has bumps (protruding electrodes) on its device surface, while a circuit board on which the semiconductor chip is placed is furnished with electrodes corresponding to the bumps. The semiconductor chip is mounted on the circuit board through a flip-chip process with the bumps being coupled with the circuit board electrodes. In order to further miniaturize the semiconductor chip, the pitch of the protruding electrodes has to be further narrowed.
Conventionally, protruding electrodes made of solder (hereinafter, referred to as “bumps”) are formed on the device surface of a semiconductor chip by solder paste printing, solder ball transfer, solder plating, or other techniques. The bump pitch used to be 500 μm, which has been narrowed to 250 μm, and further to 200 μm, along with the progress of high-density technologies. It is expected that in the near future a grid-array bump pitch of less than 50 μm is required. With such a narrow pitch, slight positional offset of the semiconductor chip with respect to the circuit board generally prevents reliable electrical connection. However, by making use of the self-aligning phenomenon occurring when spherical solder ball bumps are employed, the positional offset can be self-corrected. For this reason, spherical solder bumps are desired.
On the other hand, a structural problem occurs in narrow-pitch flip-chip mounting. A large amount of stress is applied to the bumps due to difference in the thermal expansion characteristic between the circuit board and the semiconductor chip. Under large stress on the bumps, the reliability in electrical connection between the semiconductor chip and the circuit board is degraded. To reduce the stress, it is necessary to make the height of the bumps as great as possible with respect to the bump pitch and to maintain the adhesion or contact between the base metal of the solder ball and the underlying layer.
Concerning the fabrication aspect, paste printing is unsuitable for forming narrow pitch solder bumps because the grain size of a typical solder paste is similar to the pitch size. Ball transfer processes are also unsuitable because such small balls cannot be held reliably. Consequently, plating is selected.
When fabricating bump electrodes on a semiconductor chip by electrolytic plating, a resist pattern defining a bump array is formed, and then metal is grown in the resist pattern by electrolytic plating. Such a method is disclosed in, for example, JP 11-195665A (Kokai), at pages 7–8 and in FIG. 2.
However, if the pitch of the ball grid array becomes narrower, the opening pattern of the resist layer becomes finer, and the aspect ratio (the ratio of the depth to the inner diameter of the opening) becomes large. This makes it difficult for the electrolytic plating liquid to get into the openings of the resist pattern because a resist material generally has a hydrophobic nature and sheds the plating liquid.
If the openings of the resist pattern cannot be sufficiently filled with the electrolytic plating liquid, the thickness of the growing plating layer varies, and uniform-shaped bumps cannot be fabricated. Such non-uniform bumps greatly reduce the reliability in electrical connection between the semiconductor chip and the circuit board.